Dr. Renu Mehra is the Vice President of Engineering for the Silicon Realization Group at Synopsys and R&D Group Director for the Digital Design Group at Synopsys and heads the Design Compiler R&D Team.
Dr. Renu Mehra received her bachelor's in Electrical Engineering from IIT Kanpur in 1991 and subsequently went on to complete her MS and PhD in Electrical Engineering and Computer Sciences from the University of California, Berkeley.
Dr. Renu Mehra is a versatile global technical leader with experience in the latest cutting edge software technology. She was a founding member of the IEEE 1801 working group that created the Unified Power Format, now the dominant power intent specification format for the semiconductor industry. She holds several U.S. patents and has published her work in international conferences and journals. She is an active contributor to various International Conferences and serves on the Executive Committee For the Design Automation Conference.
She had also worked as a Staff R&D Engineer for Clearwater Networks. She was a technical program chair of the Executive Committee, Design Automation Conference. She is an expert in low power design, graph-based algorithms and power management. Extending her influence beyond her team, Dr. Mehra actively works with groups across Synopsys and leads the cross business-unit power management initiative.
